Real-Time System for High-Image Resolution Disparity Estimation

Abstract

We present the hardware implementation of a simple, fast technique for depth estimation based on phase measurement. This technique avoids the problem of phase warping and is much less susceptible to camera noise and distortion than standard block-matching stereo systems. The architecture exploits the parallel computing resources of FPGA devices to achieve a computation speed of 65 megapixels per second. For this purpose, we have designed a fine-grain pipeline structure that can be arranged with a customized frame-grabber module to process 52 frames per second at a resolution of 1280times960 pixels. We have measured the system’s degradation due to bit quantization errors and compared its performance with other previous approaches. We have also used different Gabor-scale circuits, which can be selected by the user according to the application addressed and typical image structure in the target scenario.

Publication
IEEE Transactions on Image Processing
Eduardo Ros
Eduardo Ros
Full Professor

Full professor in computer architecture, principal investigator at the Computational Neuroscience and Neurorobotics Lab and principal investigator of the VALERIA lab of the University of Granada.

Ríchard R. Carrillo
Ríchard R. Carrillo
Assistant Professor

Associate Professor at the Department of Computer Engineering, Automation and Robotics and Principal Investigator at the Applied Computational Neuroscience Group.