FPGA implementation of a Perceptron-Like Neural Network for Embedded Applications

Abstract

In this work we present several hardware implementations of a standard multi-layer perceptron and a modified version called extended multilayer perceptron. The implementations have been developed and tested onto a FPGA prototyping board. The designs have been defined using a high level hardware description language, which enables the study of different implementation versions with diverse parallelism levels. The test bed application addressed is speech recognition. The contribution presented in this paper can be seen as a low cost portable system, which can be easily modified. We include a short study of the implementation costs (silicon area), speed and required computational resources.

Publication
7th International Work-Conference on Artificial and Natural Neural Networks
Eduardo Ros
Eduardo Ros
Full Professor

Full professor in computer architecture, principal investigator at the Computational Neuroscience and Neurorobotics Lab and principal investigator of the VALERIA lab of the University of Granada.

Ríchard R. Carrillo
Ríchard R. Carrillo
Assistant Professor

Associate Professor at the Department of Computer Engineering, Automation and Robotics and Principal Investigator at the Applied Computational Neuroscience Group.